IP Design Verification Engineer

Lattice

A global technology company is seeking a Design Verification Engineer in Penang, Malaysia.This role involves developing verification test plans and metrics for complex designs, requiring strong analytical skills, previous experience with UVM/OVM, and programming skills in languages such as C/C++.Can

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IP Design Verification Engineer

Lattice

Updated 28 days ago
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Penang

About the Company

Lattice is a global technology company specializing in advanced semiconductor solutions.

Key Highlights

  • Requires expertise in UVM/OVM for design verification
  • Involves developing complex verification test plans
  • Candidates should have programming skills in C/C++
  • Located in Penang, Malaysia
  • Full-time position with mid-level experience

💡 Honest Take: This role is ideal for mid-level engineers looking to advance in a tech-driven environment, but may not be suitable for those without prior UVM experience.

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